ISCAS85 Benchmark Format
-- 10 Combinational Circuits --

A. The 0th line reports the statistics of a circuit
   in the following order:
	#gates #wires #pris #pos #lines
   Note that: #lines doesn't include the 0th line.

B. The netlist is listed from the 1th line to the end;
   Each line reports the connectivity and timing relationship

1. Gate id = line number
2. Gate type : pri(primary input), not, and, or...etc.
	       If gate i is one primary output,
	       "po" is indicated before the gate type.
3. Number of output
4. Number of input
5. 1st input gate id
6. rising time
7. falling time
8. 2nd input ....

e.g.
******				
4 7 3 1 7                       //#gates #wires #pris #pos #lines
pri 1 0 			//gate 1: PI (#outputs = 1, #inputs = 0)
pri 2 0				//gate 2: PI
pri 1 0				//gate 3: PI
and 1 2 1 1.0 1.0 2 3.0 3.0	//gate 4: AND, input: 1, 2 (#outputs = 1, #inputs = 2)
and 1 2 2 3.0 3.0 3 4.0 4.0	//gate 5: AND, input: 2, 3
or 1 2 4 2.0 2.0 5 3.0 3.0	//gate 6: OR,  input: 4, 5
po not 0 1 6 1.0 1.0		//ate 7: NOT, input: 6	(PO)
******

Circuit:

|---|   1
| 1 |----------|---|
|---|          | 4 |----| 2
 pri     ------|---|    |-------|----|
        3|                      |    |  1  |---|
|---|----|                      | 6  |-----| 7 |
|   |          |---|    |-------|    |     |---|
| 2 |----------| 5 |----| 3     |----| 
|---|          |   |
 pri     |-----|---|
        4|
|---|    |
| 3 |----|
|---|
 pri